Parallel machine architecture and compiler design facilities

The objective is to provide an integrated simulation environment for studying and evaluating various issues in designing parallel systems, including machine architectures, parallelizing compiler techniques, and parallel algorithms. The status of Delta project (which objective is to provide a facility to allow rapid prototyping of parallelized compilers that can target toward different machine architectures) is summarized. Included are the surveys of the program manipulation tools developed, the environmental software supporting Delta, and the compiler research projects in which Delta has played a role

On the Design of Interconnection Networks for Parallel and Multiprocessor Systems

155 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1981.This thesis proposes two network configurations for parallel and multiprocessor systems. They are basically shuffle-exchange type of networks.One of them uses the principles of circuit switching networks, the other uses the principles of packet switching networks.The capabilities and performances of the networks using various control algorithms are also discussed.U of I OnlyRestricted to the U of I community idenfinitely during batch ingest of legacy ETD

Compiler Analysis for Cache Coherence: Interprocedural Array Data-Flow Analysis and Its Impacts on Cache Performance

In this paper, we present compiler algorithms for detecting references to stale data in sharedmemory multiprocessors. The algorithm consists of two key analysis techniques, stale reference detection and locality preserving analysis. While the stale reference detection finds the memory reference patterns that may violate cache coherence, the locality preserving analysis minimizes the number of such stale references by analyzing both temporal and spatial reuses. By computing the regions referenced by arrays inside loops, we extend the previous scalar algorithms [8] for more precise analysis. We develop a full interprocedural array data-flow algorithm, which performs both bottom-up side-effect analysis and top-down context analysis on the procedure call graph to further exploit locality across procedure boundaries. The interprocedural algorithm eliminates cache invalidations at procedure boundaries, which were assumed in the previous compiler algorithms [9]. We have fully implemented the ..

Interprocedural Induction Variable Analysis

Induction variable analysis is an important part of the symbolic analysis in parallelizing compilers. Induction variables can be formed by for or DO loops within procedures or loops of recursive procedure calls. This paper presents an algorithm to find induction variables in formal parameters of procedures caused by recursive procedure calls. The compile-time knowledge of induction variables in formal parameters is essential to summarize array sections to be used for data dependence test and parallelization

Execution-Driven Tools for Parallel Simulation of Parallel Architectures and Applications (*)

Execution-driven techniques instrument application codes to generate events for simulation or tracing. Previously reported systems using execution-driven techniques have provided critical path simulation, trace generation, or execution-driven simulation capabilities. Critical path simulation performs implicit, optimistic parallelization of serial codes and is used to study parallelism and performance. This paper describes EPG-sim, a newly-developed set of execution-driven tools that performs parallel execution-driven simulation and trace generation for studying parallel systems. These tools integrate the above execution-driven techniques into a single framework through the use of intelligent source-level instrumentation. The tools can be used to model varying processor and system architectures, and can simulate serial, optimistically parallelized, or parallel codes being executed on modeled parallel systems. Critical path simulations, trace generation, and execution-driven simulations ..